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Siri AB is a consulting company offering IT and product development services since 2011 with offices in Malmö, Gothenburg, Stockholm, Berlin(Germany) and Hyderabad(India). While most of the work in based out of Stockholm, you may need travel between Skåne, Göteborg and Stockholm. We are looking for a skilled ASIC/FPGA Engineers.
Your work will consist of ASIC/FPGA verification using Specman or SystemVerilog. You will also be working in complex digital ASIC designs and filters.
We are looking for more ASIC/FPGA design, development and verification Engineers that have the following skills.
The job involves block verification within digital ASIC and FPGA projects.
The goal of the block verification is to verify that the functional requirements of our blocks are fulfilled before tape-out of the ASIC or release of the FPGA.
Most of the verification uses constrained random methodology but also dedicated test-vectors and assertions are used.
Responsibilities & Tasks:
• Verification planning
• Verification specification
• Verification environment (creation/adaptation/maintenance).
• Test case creation
• Usage of uVC´s
• Development of uVC´s (if needed)
• Usage of reference models (if needed)
• Constrained random testing
• Creation of Coverage matrix
• Writing Verification Reports
Requirements - Must list :
• 6 -9 years of experience
• Experienced in IP module verification using the System Verilog tools and UVM methodology
• Excellent programming skills in System Verilog
• Experience in HW verification using e.g. OVM/UVM
• Good knowledge of verification methodology in general
• Experience in system level verification
• Experience in Formal Verification
• Good scripting skills in Python