• Notera att ansökningsdagen för den här annonsen kan ha passerat. Läs annonsen noggrant innan du går vidare med din ansökan.

Our company

Capgemini Engineering is part of Capgemini and has more than 270 000 employees located all over the world. Our core values Ambition & Care affect everything we do and we will always put our employees first. As a global company, we provide our clients with sustainable engineering solutions that tackle the environmental challenges of today.

Our goal is to help you thrive in your role and expand your knowledge and expertise. At Capgemini Engineering, we focus on getting tight groups where team members can help each other even if their assignment are at different companies. We meet several times a month for lunch or other activities to maintain and share knowledge.

Working for Capgemini Engineering is more than just a job. We have several activities during the year where we meet to share knowledge or just to have fun.

Your role

Be working in a team responsible for IP or Subsystem development.

Implement and systemize IP or Sub-system designs that enable 5G communication.

Drive continuous improvements in products and processes and develop competence in the technical domain

Modeling, RTL design, block and sub-system level verification

Several years of experience in ASIC or FPGA using System Verilog or VHDL

Experience working with micro-architecture and systemization

Appreciation for continuous improvement and optimized ways of working

Your profile

You are a team player and the assignments require you to work in agile teams according to Kanban or Scrum.

Experienced in VHDL

Development of ADC, DAC and high speed links

Scripting in Linux environment (Bash, Python or similar)

It is also desirable that you have programmed in C in real-time critical OS

Do not hesitate, send in your application as soon as possible, recruitment has already begun.

Application and contact

Selection and interviews are running continuously. Apply now since we assign roles during the whole application time span. For questions and for more information contact Jan Hansson, Talent Acquisition Partner, 0725-616900

We kindly but firmly refrain from direct contact with staffing, brokerage and recruitment companies as well as other external actors and sellers of additional job advertisements.

Detta är en jobbannons med titeln "ASIC and FPGA Designer" hos företaget Altran och publicerades på webbjobb.io den 31 januari 2022 klockan 17:16.

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