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We are now looking for a ASIC & FPGA Developer to lead a team of 10+ ASIC/FPGA Engineers at the work site of one of our clients.

Job description
· You will be part of a high end technology project with the goal
to develop and verify complex digital designs.
· Responsible for the specification, design and verification of
high-quality ASIC/FPGA applications and Systems.
· Responsible for handling customer requirements and team
deliverables.

Required competence
· Minimum 12+ years of experience in working with ASIC &
FPGA Development.
· Experience in Customers interactions and project deliverables.
· Experience in digital ASIC design from system study to tape-
out.
· Experience with FPGA, Zynq UltraScale+ MPSoC.
· Front-end RTL Design expertise in VHDL / Verilog
· Experience in ASIC synthesis using RTL Compiler or
Synopsys Design Compiler.
· Experience with HDL simulation, synthesis, and timing closure
· Experience in Logical equivalence checking Formality, Jasper
or FormalPro.
· Experience in Static Timing Analysis using Synopsys Prime
time
· Experience in HVL System Verilog and verification
methodology UVM, OVM & VMM.
· Test plan development, Execution, Functional and Code
coverage.
· EDA Simulation tools Questasim/ NCSim / VCS.
· Post Silicon Debug and Validation.
· Programming language C, C++ and concepts of OOP?s.
· Version control tools like CVS/ SVN/ Clear case/Perforce
· Scripting Languages Perl/Python/Shell/Tcl.
· Experience from verification of complex digital SoC designs
with CPUs, DSPs.
· Knowledge of high-speed interfaces such as PCIe, USB,
SATA, Ethernet, DDR3/4, LPDDR3/4.
· Knowledge ARM AXI protocol.
· Knowledge of other devices/standards such as SPI, IIC, SD,
NAND, QSPI

Detta är en jobbannons med titeln "Team Leading ASIC and FPGA Developer" hos företaget Aurenav sweden filial av aurenav llc usa och publicerades på webbjobb.io den 25 augusti 2016 klockan 13:28. Jobbannonsen kommer från en extern källa.
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