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We are, fore one of our customer, looking for ASIC verification engineers. The team is developing complex designs for mobile communication.
Job description:
You will be part of a high end technology project with the goal to develop and verify complex digital mobile communication designs
Your responsibility will be either top or block level verification of a ASIC/FPGA design
Required competence
Minimum 5 years experience of ASIC/FPGA verification
Documented previous SystemVerilog experience
UVM(OVM) experience
Experience from verification of complex digital SoC designs with CPUs, DSPs, advanced filters and high speed links
Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated
Candidates shall also have good written and verbal communication skills in English
Wanted competence (nice to have)
Experience from C++, Specman (e), VHDL, Verilog, SystemC, PERL
Xilinx and/or Altera experience
Assignment start:
ASAP
Full time assignment, in-house in Stockholm.
Hur du söker jobbet
Ansökan sker via e-post till career@sellegi.se.